As semiconductor integrated circuits become more complex the feature sizes of individual components are continually being reduced. In addition to feature size reduction, multiple layers of metal interconnects are used to electrically connect the various components of the integrated circuit. The evolution of semiconductor device technology toward smaller features together with the use of multiple metal layers makes the fabrication of state-of-the-art integrated circuits more difficult. Complex fabrication technology is needed to produce electrical interconnect structures having low electrical resistance and continuous electrical pathways.
To accommodate the numerous electrical interconnects which must be formed to an ever increasing number of device components, the contact and via openings formed in interlevel dielectric layers must have a very small diameter. Presently, via openings are fabricated with diameters of one micron or less. While the diameter must be reduced to accommodate the increased number of interconnects, the thickness of the dielectric layer separating the various levels of interconnect layers cannot be decreased without risk of reduced device performance. This has the effect of increasing the aspect ratio of the via openings. The aspect ratio is defined as the depth of the contact opening versus the diameter of the contact opening. In state-of-the-art devices, aspect ratios of 2 to 1, or greater, are commonly encountered. Small diameter openings created in a thick dielectric layer result in the formation of high-aspect-ratio contact openings.
Where the aspect ratios are large it can be difficult to conformally deposit the necessary metal layers needed for the fabrication of a metallized contact structure. Often, when the metal is deposited into a deep contact opening complete, coverage of all contact surfaces is not obtained. Also, poor step coverage is common when multiple layers of metals are used to form an inlaid metal interconnect. Typically, a high-aspect-ratio via is located at the bottom of a channel formed in an interlevel dielectric layer. Metal must uniformly fill both the channel and the underlying via opening.
The formation of an inlaid, aluminum interconnect in which aluminum metal conformally overlies all the surfaces of the highly contoured interconnect openings requires the uniform deposition of aluminum metal on all surfaces of the opening. Conventional physical vapor deposition (PVD) techniques often do not provide adequate step coverage to completely cover the interior surfaces of contact openings. Current techniques used to provide improved metal interconnects and minimize process complexity include a combination of PVD deposited metal and chemical-vapor-deposition (CVD) deposited metal. The combination is advantageous because the PVD deposition process provides a method of depositing a nucleation layer on a dielectric surface. The CVD process is an isotropic deposition process and thus possesses desirable characteristics for the filling of via opening.
Although use of a CVD process improves the step coverage in a high-aspect-ratio via, analysis of very narrow via openings reveals the presence of gaps in metal coverage at the bottom of the via openings. The use of a selectively deposited aluminum to fill the via openings has been proposed to overcome the gap problem but it too has drawbacks. Use of selective aluminum requires a pre-cleaning step to remove a native oxide layer which forms on the underlying metal contact area. In one technique, an argon sputter operation is used to remove this native oxide. However, the process window for the pre-clean is very tight. An insufficient clean leaves islands of the native oxide, which leads to selective aluminum growth having voids. One can compensate for this by over-cleaning, but then the argon ions begin to sputter the underlying metal contact area beneath the native oxide. This sputtered metal tends to then deposit as islands along the sidewalls of the via openings. During the selective aluminum growth, aluminum then nucleates along the sidewalls on the metal islands, in addition to nucleating on the bottom of the via opening, causing trapped voids in the metal plug.